A Design of 14-bits ADC and DAC for CODEC Applications in 0.18 µm CMOS Process
نویسندگان
چکیده
08:00 REGISTRATION: Lecture Theatre J, LTJ, HKUST 09:00-09:10 Opening Ceremony 09:10-09:20 Welcome Address: Professor Roland Chin, Vice President for Academic Affairs, HKUST 09:20-09:40 Committees Address: General and Program Chairs 09:40-10:20 Keynote by Professor Niraj K. Jha, EEE Department, Princeton University, USA “Digital System Testing: Emerging Issues, Trends and Solution Approaches” venue: Lecture Theatre J, LTJ. 10:20-10:50 BREAK 10:50-12:10 SESSION 1, (Lecture Theatres J and K, HKUST)
منابع مشابه
A 12 bit 76MS/s SAR ADC with a Capacitor Merged Technique in 0.18µm CMOS Technology
A new high-resolution and high-speed fully differential Successive Approximation Register (SAR) Analog to Digital Converter (ADC) based on Capacitor Merged Technique is presented in this paper. The main purposes of the proposed idea are to achieve high-resolution and high-speed SAR ADC simultaneously as well. It is noteworthy that, exerting the suggested method the total capacitance and the rat...
متن کاملDesign of a 12.8 ENOB, 1 kS/s pipelined SAR ADC in 0.35-mu m CMOS
This paper presents a 15-bit, two-stage pipelined successive approximation register (SAR) analog-to-digital converter (ADC) suitable for low-power, cost-effective sensor readout circuits. The use of aggressive gain reduction in the residue amplifier combined with a suitable capacitive array DAC topology in the second stage simplifies the design of the operational transconductance amplifier (OTA...
متن کاملDesign and Implementation of a 10-bit SAR ADC with A Programmable Reference
This paper presents the development of a 38.5 kS/s 10-bit programmable reference SAR ADC which is in MIMOS’s 0.35 μm CMOS process. The design uses a resistive DAC, a dynamic comparator with pre-amplifier and logic to create 10 effective bits ADC. A programmable reference circuitry allows the ADC to operate with different input ra 0.6 V to 2.1 V. The ADC consumed less than 7.5 mW power with a 3 ...
متن کاملA 12-bit 100kS/s SAR ADC for Biomedical Applications
This paper describes a 12-bit 100kS/s successive approximation register analog-todigital converter (SAR ADC) for biomedical system. Both top-plate sampling technique and VCM-based switching technique are applied to the capacitor digital-to-analog converter (CDAC) to implement a 12-bit SAR ADC with 10-b capacitor array DAC. To enhance the linearity of proposed ADC, thermometer decoder is used in...
متن کاملAn 87 fJ/conversion-step 12 b 10 MS/s SAR ADC using a minimum number of unit capacitors
This work proposes a 12 b 10 MS/s 0.11 lm CMOS successive-approximation register ADC based on a C-R hybrid DAC for low-power sensor applications. The proposed C-R DAC employs a 2-step split-capacitor array of upper seven bits and lower five bits to optimize power consumption and chip area at the target speed and resolution. A VCM-based switching method for the most significant bit and reference...
متن کامل